Raytheon Technologies Sr Electrical Engineer I / II - FPGA Verification in Marlborough, Massachusetts
Senior Electrical Engineer I/II - FPGA Verification Engineer
The Radar Controls and Electronics Department in the Electrical Product Team (EPT) at Raytheon Missiles & Defense (RMD) is seeking an Electrical Engineer with strong Field Programmable Gate Array (FPGA) verification skills to join our team. This engineer will verify FPGA interfaces, controls and/or data processing designs.
The individual is expected to work in a team environment, on diverse projects and receive direction from his/her lead. The individual will be required to provide development support throughout product lifecycle, from initial concept to acceptance delivery to maintenance. This position can be a salary grade Senior Electrical Engineer I or II depending on experience.
U.S. Citizenship status is required as this position will need a U.S. Security Clearance within 1 year of start date.
Applicant will work as part of a highly motivated team environment, and will be collaborating with cross-functional project teams making up a larger program or internal research and development efforts. Our engineers are assigned to a manager of approximately 20 employees with similar skills. Each section manager is responsible for their members’ performance, career development, and assigning tasks that balance the employees’ interests with current needs of the project teams.
This position can be a Senior Electrical Engineer I – G08 or Senior Electrical Engineer II –G09 based on the candidate’s qualifications as they relate to the skills, experience and responsibilities required for the position.
Minimum of 4 years of professional experience verification of FPGAs / ASICs using UVMF/UVM/OVM
Experience in Xilinx programmable devices or Intel programmable devices
Experience using VHDL/SystemVerilog simulation tools, QuestaSim or NCSim
Experience using synthesis tools including Synplify and back-end tools including Xilinx Vivado, Intel Quartus and others
Experience writing constrained random test benches using System Verilog with UVM.
Managing regression simulations
6 years of professional experience verification of FPGAs / ASICs using UVMF/UVM/OVM
Experience using Verification IPs (such as QuestaVIP) and/or third-party Verification BFMs
Working knowledge in common computer hardware interface and data protocols such as RS-422, USB, PCIe, etc.
Experience with code and functional coverage
Experience in hardware integration, CCA/PCB design, FPGA design or embedded software
Working knowledge and experience with configuration management tools such as Synergy, Clearcase, or git
Experience with Mentor Graphics UVMF based test benches
Knowledge of load sharing tools such as LSF or condor
Experience using an agile development process
Ability to work with a diverse team of engineers
Experience in high speed interfaces such as SRIO, Aurora Experience with Timing Closure and utilizing Chipscope
Experience and knowledge developing requirements for FPGA products
Understanding of computer architecture and computer hardware optimization techniques
Working knowledge of Configuration Management principles, environments and tools
Proficiency in Linux
Working knowledge in the integration of software drivers for the operation of computer hardware interfaces a plus
Working knowledge of C/C++ and/or in computer scripting language such as Shell/Perl/Python a plus
Working knowledge/course work of signal & image processing, digital communications and/or control theories
Required Education (including Major):
- B.S. in Electrical Engineering or STEM Major (advanced degree a plus)
Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, age, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.