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Raytheon Technologies Senior FPGA ASIC Verification Engineer in Tucson, Arizona

At Raytheon Missiles and Defense, we continue to develop leading technologies to the US military and our allies. We have added power to the world’s most advanced fighter jets with the AMRAAM (Advanced Medium Range Air to Air Missile) and continue to provide state of the art electronics, systems and other capabilities in the areas of sensing; effects; and command, control, communications and intelligence systems; as well as a broad range of mission support services. Behind all our projects, there is a team of talented engineers which we are looking to grow. Raytheon Technologies offers employee benefits such as:

  • 9/80 work schedule with every other Friday off

  • 401(k) – Savings & Investment Plans

  • Paid Time Off

  • Student Loan Contribution Plans

  • Educational Assistance

  • Parental Leave

    Within the Digital Products Department, you will be developing technical solutions to complex problems that require software skills, ingenuity and creativity. As we deploy our Universal Verification Methodology (UVM) based verification capability, we need Verification Engineers to participate in the functional verification of ASICs/FPGAs as-needed. You will participate in a multidiscipline team of engineers to create constrained random agents, test benches and tests. Communication and teaming skills are strongly valued in this environment.

We are looking for talented engineers who can quickly learn and incorporate new concepts to provide solutions to complex scenarios using state of the art tools to make the world a safer place.

Responsibilities to Anticipate:

  • Drive projects and execute to program schedules on time and budget

  • May lead small teams and mentor junior engineers

  • Demonstrate self-motivation, with little supervision required

  • Designing tests for applications, algorithms, interfaces and subsystems that employ FPGAs and ASICs.

  • Creating models to be used in the verification and validation of interfaces, applications and algorithms for subsystems.

  • Designing verification environments with random constrained or directed test scenarios.

  • Interpreting requirements to develop test environments.

  • Support internal and external technical reviews

    NOTE: This position can be either a Sr Electrical Engineer II (G09) or Principal Electrical Engineer (G10) based on the candidate’s qualifications as they relate to the skills, experience and responsibility requirements for the position .

    Qualifications You Must Have:

  • The ability to obtain and maintain a US security clearance prior to the start date. U.S. Citizenship is required as only U.S. citizens are eligible for a security clearance.

  • Bachelor of Science degree in Computer Science, Computer Engineering, or Electrical Engineering

  • A minimum of 6 years of experience in the implementation of modern verification environments that include use of constrained-random stimulus and/or use of functional coverage involving UVM.

  • Coding experience with scripting languages such as Perl and Python.

  • Experience with the HVL language System Verilog.

  • Experience in Linux.

  • Experience in configuration management and version control tools such as GitHub or svn, or others.

  • Experience in Agile methodology for the software development lifecycle.

    Qualifications We Value:

  • Hardware skills and test experience – Debugging and troubleshooting design, systems and subsystems.

  • Knowledge of digital signal processing techniques and implementations.

  • Ability to learn and implement new processes, tools and concepts to solve verification and test challenges.

  • Experience working in a team environment.

  • Self-directed – Able to complete tasks with minimal oversight.


Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, age, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.